The increase of high level integration within electrical integrated circuits (IC), has resulted in higher data rates and larger numbers of IC interconnections. Today, the inherent signal speed of ICs has increased to 3 GHz, and shortly it will reach to 10 GHz and beyond. The number of pin connections has also increased, with a single IC requiring close to 2000 interconnections (e.g., a single processor), and shortly it will require over 5000. Simultaneously, achieving higher data rates and higher off-chip interconnection densities, will be increasingly difficult as IC technologies continue to evolve with increasing signal speed of electronic devices and increasing numbers of interconnections. Technology for off-chip interconnections on PCBs is also becoming increasingly difficult with the increased density of interconnects from die-level packaging to chip-to-chip interconnections on the PCB (hereinafter “chip” indicates the die with packaging), as well as increasing signal speeds and increasing numbers of interconnections.
With increasing signal speeds and interconnections in ICs, low-cost, high-speed interconnection techniques compatible with today's manufacturing processes are highly desirable at the consumer level. Today's PCB is mainly made of uniform epoxy-glass composite FR4) material, and FR4 and PCB manufacturing technologies are so well matured that most system vendors prefer FR4-based PCBs to keep system costs low. However, FR4 has material characteristics which limit its usage in high-speed applications with conventional interconnection structures because FR4 has a high dielectric loss which limits the bandwidth of interconnection structures.
FIG. 1 shows part of a conventional PCB. For simplicity in understanding, only a portion of the PCB is shown here. Conventional PCB 10 consists of single or multilayer of uniform core layers 12, prepreg (shorthand expression for “Pre-impregnated” type epoxy, used for stacking multiple dielectric layers) 14, signal lines 16A, 16B and ground planel8. The core layer 12 could be any uniform dielectric material. Usually, FR4 (trade name) is used as the core layer for conventional PCB. The prepreg 14 is an epoxy resin used between the core layers 12 to stack the multiple core layers 12. The high-speed electrical signal flow through the signal lines 16A, and 16B laid on the core layers 12, and the ground lines 18 are laid on the side of the core layer 12 opposite the signal lines 16A, and 16B. The thickness of the core layers 12, the relative dielectric constant of the core layers 12, the thickness of the ground layers 18, and the width of the signal lines determine the impedance of the signal line. The signal lines 16A, and 16B can be microstrip line type transmission line 16A or stripline type signal line 16B, as shown in FIG. 2. In conventional PCB technologies, the microstrip line type transmission lines 16A has the ground 18 separated by the uniform/homogeneous dielectric core layer 12A, as seen in FIG. 2A. Stripline type transmission lines 16B are also used in conventional PCB technologies, in which the signal line 16B is embedded into the homogeneous dielectric layer 12B, and both sides of the core layer 12B have a ground 18, as shown in FIG. 2B.
Conventional PCB 10, as shown in FIG. 1, is manufactured in a way corresponding to the flow chart shown in FIG. 3, which depicts an explanatory diagram for the conventinal method of PCB manufacturing. The dielectric sheet 21 is made using the standard PCB technology such as the slurry casting process. The slurry is cast into about 200 .mu.m to 500 .mu.m thick ceramic sheets using a slip cast process. The PCB core layer 12 is the homogeneous layer usually used in the conventional PCB 10. After the patterning and subsequent etching 23, the signal line is made on the side of the core layers. Making the micro-via and the subsequent micro-via filling process 25 is done, if necessary. Following this, the ready-to-be-stacked sheets 27 are laminated together by a hot press to form the completed multilayer PCB 29. Density heterogeneities in the laminated samples influence any shrinkage in the sintered substrate. Therefore, this lamination process is homogeneously carried out using the correct dimensions for the die and punch with flat surfaces. Burn-out and sintering processes for the multi-layered PCB board 10 may be necessary after lamination at a temperature suitable to the dielectric material used for the sheets 21. The via hole opening and subsequent metal filling (not shown here) are usually done. A ceramic sheet 21 may have more than 10,000 via holes in a 50 to 250 .mu.m square area.
In conventional PCB 10, the signal line 16A is either laid on the dielectric material 12 or embedded into the dielectric material. Signal dissipation during propagation through the signal line 16A depends on the dissipation factor (loss tangent) of the dielectric material used as the core layer in the PCB. This dissipation occurs because the electric field (not shown) between the signal line 16A and the ground 18 passes through the dielectric material 12. This signal dispersion is proportional to the signal frequency, i.e., the signal speed. This means that the higher the signal speed, the lower the signal transmission distance can be for the fixed dielectric material. In the other words, the higher the speed, the lower the bandwidth of the signal line which is used for connecting one chip to another chip on the a PCB. If the loss tangent of the dielectric material is high, the bandwidth of the interconnection is limited so that high-speed signals cannot be sent over longer distances, while interconnection systems with dielectrics having a lower loss tangent are more capable of sending high-speed signals over longer distances.
In addition to loss tangent, the dielectric constant of dielectric material 12 is also important, especially with the electric field inside the dielectric material increasing the dielectric constant. This increased dielectric constant causes the system to experience more signal delay, increasing the need for a dielectric material with a low dielectric constant. An increased dielectric constant also causes more signal skew as the length of the signal line increases. Thus, a dielectric material with a lower dielectric constant is necessary in interconnection systems for high-speed signal interconnection. This is true for both on-chip and off-chip interconnection systems. Lower dielectric constant materials with low dielectric loss offer the following traits: (1) higher density interconnection due to reduction of cross talk, (2) reduced capacitance of the interconnection thus allowing for longer transmission line distances, and (3) lower propagation delay.
When considering signal loss and signal delay for various signal line lengths, it is highly desirable to design interconnection systems on PCBs with a low effective dielectric constant and low effective loss tangent.
Increased bandwidth is possible if materials with lower loss tangents and lower dielectric constants are used. However, new material development is necessary for off-chip interconnection technology. Improved manufacturing technology is necessary for development of off-chip interconnection technologies implemented at the product level. Conventionally, increased the interconnection bandwidth is achieved by using dielectrics with a lower loss tangent for the PCB layer. Such low loss tangent dielectric material is very expensive, and the manufacturing process for PCB manufacturing using these materials has not yet matured. Additionally, PCBs made of such low loss material is not very reliable. It is highly desirable to have high-speed PCBs built using conventional well-matured dielectric materials such as FR4, with which conventional well-matured fabrication processes can be used. This will reduce manufacturing costs and increase, reliability of the connection systems.
Much work in off-chip interconnection technology focuses on material development. For example, low loss materials like Polytetrafluoroethylene (PTFE), Duroid™, and Rogers 4003® are under development to achieve high bandwidth. Implementing new material in PCB fabrication processes will be very expensive (more than ten times conventional solutions) to mature the technology. In addition, new materials with low loss tangents will be incompatible with conventional processing using dielectric materials such as FR4, so is not a low-cost solution. These materials will require a much higher temperature and pressure for lamination. Today, in high-speed PCB development, more focus is on shortening the PCB length or on interconnection layout. Both shortening PCB length and improving interconnection layout will be.
As explained above, conventional PCB technology must be improved for off-chip interconnection and increasing signal speed. Also, existing conventional electrical interconnects have bandwidth limitations, and it would be very expensive to completely change PCB manufacturing technology to suit higher-bandwidth needs. It is highly desirable to lower the dielectric constant and dielectric loss of PCBs by adopting a technique or method which can be easily implemented, and which uses conventional dielectric materials and PCB technology.